aesni: Make sure the CPU supports SSSE3

There are no real CPUs that support AES-NI/PCLMULQDQ but don't support
SSSE3.  However, in VMs the vCPU features might not exactly match those
of the underlying CPU.  So if SSSE3 is missing, the PSHUFB instruction
would cause a SIGILL.  The referenced commit is the first one that uses
the `_mm_shuffle_epi8` intrinsic.

Fixes: 74d43cbde9 ("aesni: Implement a AES-NI based CTR crypter using the key schedule")

src/libstrongswan/plugins/aesni/aesni_plugin.c

@@ -96,7 +96,8 @@ METHOD(plugin_t, get_features, int,
 	};
 
 	*features = f;
-	if (cpu_feature_available(CPU_FEATURE_AESNI | CPU_FEATURE_PCLMULQDQ))
+	if (cpu_feature_available(CPU_FEATURE_AESNI | CPU_FEATURE_PCLMULQDQ |
+							  CPU_FEATURE_SSSE3))
 	{
 		return countof(f);
 	}